Intel Core processors, 10th generation (shared predictor state): Shared predictor state influencing transient execution

Impact

Shared predictor state influencing transient execution on 10th-generation Core parts, leaking information to a local authenticated user. Matters where Core-class hardware runs management, build or edge-inference roles alongside the Xeon fleet.

Who can reach it

Local authenticated code.

What to do

Mitigated by an Intel microcode update plus OS/hypervisor changes. Microcode for this class is normally shipped by your distribution as an early-loadable image, so you can deploy it with a package update and a reboot without waiting for an OEM BIOS release - that distinction is the difference between a week and a quarter. Verify after reboot by reading /sys/devices/system/cpu/vulnerabilities/ rather than assuming the package took effect.

References