Database/Firmware, BMC & network fabric
Intel SGX (cache side channel on sub-cacheline access): MULTI-TENANT ISOLATION: TeeJam: shows that SGX's cache-based
Impact
MULTI-TENANT ISOLATION: TeeJam: shows that SGX's cache-based side-channel resistance is weaker than assumed at sub-cacheline granularity, enabling practical key recovery against enclave implementations previously believed to be constant-time. Operationally this matters because 'we run it in an enclave' is often the entire argument for putting a key on a shared host.
Who can reach it
Local code on the same machine as the victim enclave, with the scheduling control a privileged host has.
What to do
No single patch - mitigation lives in the enclave software (constant-time implementations hardened at sub-cacheline granularity) and in keeping the SGX SDK/PSW current. Operator action is to require enclave vendors to state which side-channel hardening they apply, and to keep microcode and PSW at current TCB so attestation reflects reality.
References
This entry is curated: imported from vendor advisories with machine assistance, not yet individually verified. Confirm against your vendor's advisory before acting, and report anything wrong.